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Since becoming available to companies outside the high-end
research community in 2000, PakSi-E™ has become
the de facto standard of performance in high-performance EDA.
PakSi-E is the only tool that gives engineers the capability to
quickly and easily conduct an RLGC parasitic extraction
on the whole package. The average PakSi-E user is able
to run this tool on their actual designs with about two hours
of training. In addition to parasitic extraction, PakSi-E also
provides users with voltage drops and current densities of the
power and ground nets. Our customers include the top global
IC foundries, semiconductor companies and design houses.
A list of features:
RLGC Matrices
SPICE sub-circuits
Whole package IBIS models
W-element models
SDF delay models
Signal integrity parameters: S, Y, Z, cross-talk ratio,
etc.
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